Table of Contents
LCD controller
The gamepad provides simple framebuffer-based display hardware.
Register map:
| Address | Desc. |
|---|---|
| 0xF0009400 | ?? seems to affect horizontal timing |
| 0xF0009404 | ?? seems to affect vertical timing |
| 0xF0009408 | ?? |
| 0xF000940C | ?? |
| 0xF0009410 | ?? |
| 0xF0009414 | ?? |
| 0xF0009418 | Total horizontal span of display (including X offset) |
| 0xF000941C | Total vertical span of display (including Y offset) |
| 0xF0009420 | ?? |
| 0xF0009424 | ?? |
| 0xF0009428 | ?? |
| 0xF0009460 | Framebuffer X offset |
| 0xF0009464 | Framebuffer width |
| 0xF0009468 | Framebuffer Y offset |
| 0xF000946C | Framebuffer height |
| 0xF0009470 | Framebuffer stride |
| 0xF0009474 | Framebuffer address |
| 0xF0009480 | Display control |
| 0xF00094B0 | Pixel format |
| 0xF00094B4 | ?? |
| 0xF0009500 | Palette address |
| 0xF0009504 | Palette data |
| 0xF0009508 | ?? |
| 0xF000950C | ?? |
| 0xF0009510 | ?? |
| 0xF0009514 | ?? |
Framebuffer registers
0xF0009460
X offset, specifies where the framebuffer will start on the screen.
0xF0009464
Framebuffer width in pixels.
0xF0009468
Y offset, specifies where the framebuffer will start on the screen.
0xF000946C
Framebuffer height in pixels.
0xF0009470
Framebuffer stride in bytes. Specifies how many bytes apart rows are.
0xF0009474
Framebuffer address. This register is 22 bits wide, thus the framebuffer may only be within main RAM.
0xF0009480
Display control register, not yet known how this works.
| Bits | Desc. |
|---|---|
| 0 | ?? breaks display |
| 1 | Must be set for display to work |
| 2 | ?? causes weird effects |
| 3 | ?? |
| 4 | Must be set for display to work |
0xF00094B0
Pixel format register.
| Bits | Desc. |
|---|---|
| 0-1 | Pixel format |
| 2 | ?? |
| 3 | ?? |
The following pixel formats are supported:
| Value | Desc. |
|---|---|
| 0 | 8-bit paletted |
| 1 | 4-bit paletted |
| 2 | 16-bit ARGB1555 |
| 3 | 16-bit RGB565 |
For the paletted formats, see the palette registers.
Palette registers
0xF0009500
Palette address. Specifies which palette entry will be accessed by 0xF0009504.
0xF0009504
Palette data.
Reading from this register returns the palette entry pointed by the address register.
Writing to this register will write to the palette entry pointed by the address register, and increment the address register.
The color format is ARGB8888. The MSB of color values seems to actually function as an alpha value, which suggests that the LCD controller may be able to blend the framebuffer with something else, presumably output from the video decoder.
Display modes
The stock firmware has settings for three different video modes.
| Setting | Mode 0 | Mode 1 | Mode 2 |
|---|---|---|---|
| X offset | 96 | 202 | 96 |
| Width | 854 | 854? | 640? |
| Y offset | 8 | 8 | 8 |
| Height | 480 | 480? | 480? |
| 0xF0009400 | 0x03B00417 | 0x01AC04EB | 0x03B00417 |
| 0xF0009404 | 0x01B201FE | 0x01BD01FD | 0x01B201FE |
| 0xF0009408 | 32 | 32 | 32 |
| 0xF000940C | 8 | 8 | 8 |
| 0xF0009410 | 96 | 202 | 96 |
| 0xF0009414 | 8 | 8 | 8 |
| 0xF0009418 | 950 | 1056 | 950 |
| 0xF000941C | 488 | 488 | 488 |
| 0xF0009420 | 96 | 202 | 203 |
| 0xF0009424 | 854 | 854 | 640 |
| 0xF0009428 | 8 | 8 | 8 |
| 0xF0009480 | 0x2 | 0x2 | 0xA |
| 0xF0009508 | 0x8 | 0x8 | 0x8 |
| 0xF000950C | 0xB2 | 0xB2 | 0xB2 |
| 0xF0009510 | 0x15C | 0x15C | 0x15C |
| 0xF0009514 | 0x7FF | 0x7FF | 0x7FF |