general_registers
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| Both sides previous revisionPrevious revisionNext revision | Previous revision | ||
| general_registers [2025/05/09 21:05] – arisotura | general_registers [2025/05/16 23:07] (current) – arisotura | ||
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| Line 120: | Line 120: | ||
| **0xF0000058** | **0xF0000058** | ||
| + | |||
| + | Hardware reset register. | ||
| ^ Bits ^ Desc. ^ | ^ Bits ^ Desc. ^ | ||
| | 0 | Reset IRQ controller | | | 0 | Reset IRQ controller | | ||
| | 1 | Reset timers | | | 1 | Reset timers | | ||
| - | | 2 | Reset RAM??? (displays static pattern) | + | | 2 | Reset RAM? | |
| | 3 | Reset DMA | | | 3 | Reset DMA | | ||
| | 4 | Reset SPI | | | 4 | Reset SPI | | ||
| Line 138: | Line 140: | ||
| | 14 | Reset I2C4 | | | 14 | Reset I2C4 | | ||
| | 15 | Reset audio controller | | | 15 | Reset audio controller | | ||
| - | | 16 | Reset ??? (0xF0008400) | | + | | 16 | Reset H264 codec (0xF0008400) | |
| | 17 | ??? | | | 17 | ??? | | ||
| | 18 | Reset ??? (0xF0008800, | | 18 | Reset ??? (0xF0008800, | ||
| | 19 | Reset ??? (0xF0008C00) | | | 19 | Reset ??? (0xF0008C00) | | ||
| - | | 20 | Reset ??? (0xF0009000) | | + | | 20 | Reset camera controller |
| | 21 | Reset LCD controller (0xF0009400, | | 21 | Reset LCD controller (0xF0009400, | ||
| Setting a bit to 1 then 0 resets the corresponding hardware component. This register is 22 bits wide. | Setting a bit to 1 then 0 resets the corresponding hardware component. This register is 22 bits wide. | ||
| + | |||
| + | Bit 2 is used by the boot ROM. Using it from code running in RAM will crash the gamepad. This bit might be for resetting RAM, but at the same time, the RAM does somewhat retain old data across consecutive boots, so it's not entirely clear how this works. | ||
general_registers.1746824742.txt.gz · Last modified: 2025/05/09 21:05 by arisotura