WiiU Gamepad Technical Documentation

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====== Hardware overview ======

===== Motherboard revisions =====

There are atleast two known revisions of the WiiU gamepad motherboard.

**Revision 01** (PWB/MAIN/AU/HF-C/DH-01) is the most common.

**Revision 20** (DRC-MAIN-20) is possibly an earlier motherboard revision. The most notable difference is that the speakers are soldered directly to the motherboard instead of using connectors. There are also other minor hardware differences, the full extent of which isn't known yet.

A motherboard's revision can be read near the battery connector. It is visible even in a fully assembled gamepad.


===== CPU =====

The CPU in the gamepad is an ARM926EJ-S.

The CP15 ID registers read the following values:
^ Register ^ Value      ^ Desc. ^
| c0,c0,0  | 0x41069265 | CPU ID register |
| c0,c0,1  | 0x1D152152 | Cache info register |
| c0,c0,2  | 0x00000000 | TCM info register |

The caches are 16K each, with 32-byte lines and 4-way associativity. There are no TCMs.


===== UIC =====

The UIC is the gamepad's auxiliary microcontroller, handling input, power management, and storing settings in its EEPROM.

It is a STM8 microcontroller. The pinout of the UIC chip matches a few STM8 models, so the UIC is likely just one of these with custom marking.