timers
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| Both sides previous revisionPrevious revisionNext revision | Previous revision | ||
| timers [2024/09/23 18:31] – arisotura | timers [2025/04/13 13:51] (current) – arisotura | ||
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| They are simple prescaler counters. For example, setting them to 63 will divide the input clock by 64. | They are simple prescaler counters. For example, setting them to 63 will divide the input clock by 64. | ||
| - | The input clock seems to be the system clock, which is about 108MHz at the fast clock settings. | + | These registers are 8 bits wide. |
| ===== Count-up timer ===== | ===== Count-up timer ===== | ||
| This is a simple timer that is always counting up. When writing a value to 0xF0000408, it will begin counting from the new value. | This is a simple timer that is always counting up. When writing a value to 0xF0000408, it will begin counting from the new value. | ||
| + | |||
| + | This register is 32 bits wide. | ||
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| | 0 | ?? | | | 0 | ?? | | ||
| | 1 | Timer enable | | | 1 | Timer enable | | ||
| + | | 2 | Count direction; 0=up, 1=down | | ||
| | 4-6 | Prescaler | | | 4-6 | Prescaler | | ||
| Line 56: | Line 59: | ||
| **0xF0000414** | **0xF0000414** | ||
| - | Counter. Can be written to, the timer will count from the new value. | + | Counter. Can be written to, the timer will count from the new value. Writes are ignored when the timer isn't active. |
| - | When the timer goes past the target, the timer is reloaded to 0 and IRQ 0x00 is triggered. | + | When the timer goes past the target |
| Writing a new value greater than the target does not cause a reload. | Writing a new value greater than the target does not cause a reload. | ||
| + | |||
| + | This register is 32 bits wide. | ||
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| Target. | Target. | ||
| - | Before | + | In count-up mode, before |
| + | |||
| + | In count-down mode, before a reload, the last value the timer takes is 0. It is then reloaded to the target value. | ||
timers.1727116269.txt.gz · Last modified: 2024/09/23 18:31 by arisotura