pmic
Differences
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| Both sides previous revisionPrevious revisionNext revision | Previous revision | ||
| pmic [2025/02/08 01:21] – arisotura | pmic [2025/04/03 20:30] (current) – arisotura | ||
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| Line 27: | Line 27: | ||
| | 17 | Ground | | | 17 | Ground | | ||
| | 18 | ?? | | | 18 | ?? | | ||
| - | | 19 | Vcc1 - ?? | | + | | 19 | Vcc1 - 3.2V (UIC voltage?) | |
| | 20 | Vcc1 feedback | | | 20 | Vcc1 feedback | | ||
| | 21 | ?? | | | 21 | ?? | | ||
| | 22 | Vcc2 feedback | | | 22 | Vcc2 feedback | | ||
| - | | 23 | Vcc2 - ?? | | + | | 23 | Vcc2 - 1.24V (SoC core voltage) |
| | 24 | Power button output - to UIC pin 64 | | | 24 | Power button output - to UIC pin 64 | | ||
| | 25 | Power button | | | 25 | Power button | | ||
| Line 83: | Line 83: | ||
| Which battery level is read out of registers 0x09/0x0A seems to depend on settings in register 0x07. | Which battery level is read out of registers 0x09/0x0A seems to depend on settings in register 0x07. | ||
| + | |||
| + | Writes to register 0x07 (and 0x08): | ||
| + | |||
| + | 90 06 - to turn on the CPU | ||
| + | |||
| + | D9 - to read current battery level | ||
| + | |||
| + | D0 - to read maximum battery level | ||
| + | |||
| + | D5 - ?? to read minimum battery level?? (unused) | ||
| + | |||
| + | 00 07 - to turn off the CPU | ||
| + | |||
| + | Seems register 0x0D is set to 0xA0 after turning the CPU on/off? | ||
| + | |||
| + | Bit 5 in register 0x07 is some sort of ready bit that is checked after changing register 0x07 and before reading battery levels. | ||
pmic.1738977716.txt.gz · Last modified: 2025/02/08 01:21 by arisotura
