Differences

This shows you the differences between two versions of the page.

--- h264_codec [2025/05/16 22:24] – created arisotura
+++ h264_codec [2025/05/25 18:31] (current) – arisotura
@@ Line 6: / Line 6: @@
 ^ Address    ^ Desc. ^
+| 0xF0008404 | ??? |
+| 0xF0008408 | ??? |
+| 0xF000840C | ??? |
+| 0xF0008410 | ??? |
 | 0xF0008414 | ??? |
+| 0xF0008418 | ??? |
+| 0xF000841C | ??? |
 | 0xF0008420 | ??? |
+| 0xF0008424 | ??? |
+| 0xF0008428 | ??? |
+| 0xF000842C | ??? |
+| 0xF0008430 | ??? |
+| 0xF0008434 | ??? |
+| 0xF0008438 | ??? |
+| 0xF000843C | ??? |
+| 0xF0008440 | ??? |
+| 0xF0008444 | ??? |
+| 0xF0008448 | ??? |
+| 0xF000844C | ??? |
+| 0xF0008450 | ??? |
+| 0xF0008454 | ??? |
+| 0xF0008458 | ??? |
+| 0xF000845C | ??? |
 | 0xF0008460 | Encoding buffer alert position |
 | 0xF0008464 | Encoding buffer current position |
@@ Line 16: / Line 37: @@
 | 0xF0008478 | ???  |
 | 0xF000847C | Encoding buffer frame position |
+| 0xF0008480 | ??? |
+| 0xF000848C | ??? |
+| 0xF000849C | ??? |
+| 0xF00084A0 | ??? |
 | 0xF00084A4 | buffer address for incoming h265 data? |
 | 0xF00084A8 | another buffer address? |
-| 0xF00084AC | ??? buffer? position? |
+| 0xF00084AC | ??? buffer? position? (read-only) |
 | 0xF00084B0 | Decoding IRQ status/ack |
 | 0xF00084B8 | ??? |
@@ Line 32: / Line 57: @@
 The encoder side receives video data from the camera, encodes it, and writes the H264 bitstream to RAM.
+TODO: figure out what enables/disables the encoder/decoder
 TODO: figure out alignment requirements for the various buffer registers
@@ Line 67: / Line 94: @@
 | 0       | Position alert IRQ |
 | 1       | Frame IRQ |
-| 2       | ??? |
+| 2       | Buffer wraparound |
-| 3       | ?? |
+| 3       | Overflow?? |
 | 4-7     | ??? |
-IRQ 0 fires when the current buffer position reaches the alert position. When acknowledging this IRQ, the alert position should be updated, otherwise the IRQ will keep firing as long as the condition is met.
+IRQ 0 fires when the current buffer position reaches the alert position. When acknowledging this IRQ, the alert position should be updated, otherwise the IRQ will keep firing as long as the condition is met (ie. as long as the current position is equal to or greater than the alert position).
-IRQ 1 fires every time a full camera frame is encoded. Register 0xF000847C keeps track of where the frame ends in the encoding buffer.
+IRQ 1 fires every time a full camera frame is encoded. Register 0xF000847C keeps track of where the frame ends in the encoding buffer. That register must be read, or this IRQ will keep firing.
-IRQ 3 will fire repeatedly under certain conditions, not sure which.
+IRQ 2 fires when the current buffer position reaches the end of the buffer, and wraps around to the start.
+IRQ 3 fires when IRQ 1 should fire but two previous IRQ 1's have been missed (ie. register 0xF000847C hasn't been read). It keeps firing, not sure how to properly acknowledge it.
 I haven't observed other IRQs yet.
+The IRQs in this register trigger IRQ 0x11.
@@ Line 110: / Line 141: @@
 Encoding buffer frame position.
+^ Bits ^ Desc. ^
+| 0-23 | Frame position (memory address) |
+| 24-31 | Status? 0x09=normal, 0x0B=late, 0x0E=error/too late |
 Upon IRQ 1, this register points to the end of the frame that was just finished. It seems to be readable once, becoming zero after it has been read.
+There is a limited backlog ability to this register: if a new IRQ 1 fires while the previous position wasn't read, this register will first return the previous position, then the latest position. However, missing more than one IRQ 1 triggers an error case.