Differences

This shows you the differences between two versions of the page.

--- gpio [2025/04/19 14:26] – arisotura
+++ gpio [2025/05/13 11:38] (current) – arisotura
@@ Line 11: / Line 11: @@
 | 0xF0005044 | 0xCF01 | 0x0001  | Audio - microphone input |
 | 0xF0005048 | 0xC000 | 0x8000  | Audio related? |
-| 0xF000504C | 0xCF01 | 0x0001  | ? (possible group from F000504C to F0005078, could be camera interface?) |
+| 0xF000504C | 0xCF01 | 0x0001  | Camera - DATA2 |
-| 0xF0005050 | 0xCF01 | 0x0001  | ? |
+| 0xF0005050 | 0xCF01 | 0x0001  | Camera - DATA3 |
-| 0xF0005054 | 0xCF01 | 0x0001  | ? |
+| 0xF0005054 | 0xCF01 | 0x0001  | Camera - DATA4 |
-| 0xF0005058 | 0xCF01 | 0x0001  | ? |
+| 0xF0005058 | 0xCF01 | 0x0001  | Camera - DATA5 |
-| 0xF000505C | 0xCF01 | 0x0001  | ? |
+| 0xF000505C | 0xCF01 | 0x0001  | Camera - DATA6 |
-| 0xF0005060 | 0xCF01 | 0x0001  | ? |
+| 0xF0005060 | 0xCF01 | 0x0001  | Camera - DATA7 |
-| 0xF0005064 | 0xCF01 | 0x0001  | ? |
+| 0xF0005064 | 0xCF01 | 0x0001  | Camera - DATA8 |
-| 0xF0005068 | 0xCF01 | 0x0001  | ? |
+| 0xF0005068 | 0xCF01 | 0x0001  | Camera - DATA9 |
-| 0xF000506C | 0xCF01 | 0x0001  | ? |
+| 0xF000506C | 0xCF01 | 0x0001  | Camera - HREF (HSync output) |
-| 0xF0005070 | 0xCF01 | 0x0001  | ? |
+| 0xF0005070 | 0xCF01 | 0x0001  | Camera - VSYNC (VSync output) |
-| 0xF0005074 | 0xCF01 | 0x8001  | ? |
+| 0xF0005074 | 0xCF01 | 0x8001  | Camera - XVCLK1 (clock input) |
-| 0xF0005078 | 0xCF01 | 0x0001  | ? |
+| 0xF0005078 | 0xCF01 | 0x0001  | Camera - PCLK (pixel clock output) |
 | 0xF0005080 | 0xCF01 | 0x0000  | ? |
 | 0xF0005084 | 0xCF01 | 0x0000  | ? |
@@ Line 44: / Line 44: @@
 | 0xF00050D4 | 0xCF01 | 0x8001  | UART1 - TX |
 | 0xF00050D8 | 0xCF01 | 0x0001  | UART1 - RX |
-| 0xF00050DC | 0xCF01 | 0x8001  | ? (possible group from F00050DC to F00050E8) |
+| 0xF00050DC | 0xCF01 | 0x8001  | UART2 - IR TX |
-| 0xF00050E0 | 0xCF01 | 0x8001  | ? |
+| 0xF00050E0 | 0xCF01 | 0x8001  | UART2 - IR LED (above transceiver) |
-| 0xF00050E4 | 0xCF01 | 0x0001  | ? |
+| 0xF00050E4 | 0xCF01 | 0x0001  | UART2 - IR RX |
-| 0xF00050E8 | 0xCF01 | 0x0001  | ? |
+| 0xF00050E8 | 0xCF01 | 0x0001  | UART2 - IR PWDOWN |
 | 0xF00050EC | 0xCF01 | 0x8001  | DRC SPI - clock |
 | 0xF00050F0 | 0xCF01 | 0x0001  | DRC SPI - MISO |
@@ Line 54: / Line 54: @@
 | 0xF00050FC | 0xCF01 | 0xC300  | DRC SPI - UIC chipselect |
 | 0xF0005100 | 0xFF01 | 0xC200  | "GPIO0" - LCD - ?? toggled before I2C comm. |
-| 0xF0005104 | 0xFF01 | 0xC300  | DRC SPI - NFC chipselect(?) |
+| 0xF0005104 | 0xFF01 | 0xC300  | DRC SPI - NFC chipselect |
-| 0xF0005108 | 0xFF01 | 0x8000  | "GPIO1" - ? (used by bootloader) |
+| 0xF0005108 | 0xFF01 | 0x8000  | "GPIO1" - Flash WP (write protect) |
-| 0xF000510C | 0xFF01 | 0xD800  | "GPIO2" - ? - NFC related |
+| 0xF000510C | 0xFF01 | 0xD800  | "GPIO2" - NFC - IRQ in (from NFC module) |
-| 0xF0005110 | 0xFF01 | 0xF200  | "GPIO3" - ? - NFC related |
+| 0xF0005110 | 0xFF01 | 0xF200  | "GPIO3" - NFC - IRQ out (to NFC module) |
 | 0xF0005114 | 0xFF01 | 0x8000  | "GPIO4" - Rumble motor |
 | 0xF0005118 | 0xFF01 | 0x8000  | "GPIO5" - Sensor bar power |
-| 0xF000511C | 0xFF01 | 0x8000  | "GPIO6" - ? - camera related |
+| 0xF000511C | 0xFF01 | 0x8000  | "GPIO6" - Camera RESET |
 GPIO register format:
@@ Line 76: / Line 76: @@
 Bit 0 must be set for GPIO ports that are used by other hardware components (ie. SPI, I2C, ...). When bit 0 is set, the output value in bit 8 is ignored, and the input value in bit 10 seems to read as something regardless of bit 11.
-An exception to this rule is the ports which lack bit 0 (and bits 8-11): 0xF00502C, 0xF0005038 and 0xF0005048. Those can't be directly controlled.
+An exception to this rule is the ports which lack bit 0 (and bits 8-11): 0xF000502C, 0xF0005038 and 0xF0005048. Those can't be directly controlled.
 Setting both bit 9 and bit 11 will cause the output value in bit 8 to be mirrored in bit 10.
@@ Line 83: / Line 83: @@
 Note: when the LSB of the hardware ID register (0xF0000000) is 0x41, bits 14 and 15 are swapped. The initial values applied by the stock firmware are also different for some registers, one of them even has bit 16 set?
+There are probably settings for output drive strength. Not sure how to verify/measure that.
 Important note: improper GPIO configurations may cause shorts, which will trigger safety shutdown.