audio_controller
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| audio_controller [2025/03/20 20:39] – arisotura | audio_controller [2025/03/21 22:16] (current) – arisotura | ||
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| ====== Audio controller ====== | ====== Audio controller ====== | ||
| - | The gamepad has a simple | + | The audio controller |
| + | |||
| + | Sample frequencies of 48 KHz and 24 KHz are supported. Supporting different frequencies would require reconfiguring the [[audio amplifier]], | ||
| Register map: | Register map: | ||
| Line 31: | Line 33: | ||
| | 0xF00054B0 | Input - recording count 2 | | | 0xF00054B0 | Input - recording count 2 | | ||
| | 0xF00054B4 | Input related?? | | | 0xF00054B4 | Input related?? | | ||
| + | | 0xF00054B8 | Internal sample counters | | ||
| | 0xF00054C0 | Input - IRQ flags | | | 0xF00054C0 | Input - IRQ flags | | ||
| | 0xF00054C4 | Input - IRQ enable | | | 0xF00054C4 | Input - IRQ enable | | ||
| Line 40: | Line 43: | ||
| | 0x17 | Audio output event | | | 0x17 | Audio output event | | ||
| | 0x18 | Audio input event | | | 0x18 | Audio input event | | ||
| - | | 0x1E | Periodic IRQ | | ||
| - | |||
| - | IRQ 0x17 is used to signal certain events related to audio playback, such as start or end of playback. | ||
| - | |||
| - | IRQ 0x1E is used by the stock firmware for certain non-audio tasks such as input polling. It seems to always trigger periodically no matter what. I measured the period to be ~5547 microseconds (~600000 cycles), no idea what this represents. | ||
| - | |||
| - | |||
| - | Not yet known: | ||
| - | |||
| - | * if it is possible to play a looping sound (TODO check F0005420 bit0) | ||
| - | * how to set the sample rate (prolly directly on the amplifier) | ||
| Line 85: | Line 77: | ||
| Sound data is transmitted to the amplifier over an I2S interface. The sample clock and bit clock are generated by the amplifier, at speeds of 48 KHz and 3.08 MHz respectively. | Sound data is transmitted to the amplifier over an I2S interface. The sample clock and bit clock are generated by the amplifier, at speeds of 48 KHz and 3.08 MHz respectively. | ||
| - | Bits 6-10 control when a sample starts relative to the sample clock edges. The default setting is 1. This setting should match the audio amplifier' | + | Bits 6-10 control when a sample starts relative to the sample clock edges. The default setting is 1. This setting should match the audio amplifier' |
| Bits 11-15 seem to control the bit width of samples. 0 seems to be interpreted as 32. In practice, values 16 and above act the same. The default setting is 0. | Bits 11-15 seem to control the bit width of samples. 0 seems to be interpreted as 32. In practice, values 16 and above act the same. The default setting is 0. | ||
| Line 123: | Line 115: | ||
| Bits 3-27 are writable. It seems that the playback address has a resolution of 16 bytes (atleast with settings: 48KHz stereo 16bit), ie. setting bit 3 will cause the buffer to be played repeatedly. | Bits 3-27 are writable. It seems that the playback address has a resolution of 16 bytes (atleast with settings: 48KHz stereo 16bit), ie. setting bit 3 will cause the buffer to be played repeatedly. | ||
| - | Writing to this register while playback is in progress has no effect. TODO: not yet known how to cleanly stop playback. | + | Writing to this register while playback is in progress has no effect. |
| Line 195: | Line 187: | ||
| Failure to properly clear these flags will result in IRQs being triggered again and again, effectively freezing the main program. | Failure to properly clear these flags will result in IRQs being triggered again and again, effectively freezing the main program. | ||
| + | |||
| + | |||
| + | **0xF0005440** | ||
| + | |||
| + | Sample counter of sorts. | ||
| + | |||
| + | Updated at every sample. During sound output, goes through the following sequence: 00000000, 00000002, 00000004, 00000006, 00000008, 00020008, 00040008, 00060008, 00080008, 0008000A, 0008000C, 0008000E, 00080000, 000A0000, 000C0000, 000E0000. | ||
| Line 270: | Line 269: | ||
| Starting value is based on the recording end address in register 0xF00054A8, ie. if 0xF00054A8 is set to 3/4 inside the buffer, this counter starts at 1/4 of the buffer length. | Starting value is based on the recording end address in register 0xF00054A8, ie. if 0xF00054A8 is set to 3/4 inside the buffer, this counter starts at 1/4 of the buffer length. | ||
| + | |||
| + | |||
| + | **0xF00054B8** | ||
| + | |||
| + | Internal sample counters. They may be used to determine which sample within a given 8-byte chunk is being processed. They are updated once per sample. | ||
| + | |||
| + | ^ Bits ^ Desc. ^ | ||
| + | | 0-4 | Input L? | | ||
| + | | 8-12 | Input R? | | ||
| + | | 16-20 | Output L? | | ||
| + | | 24-28 | Output R? | | ||
| + | |||
| + | The counters work in a weird way. During sound output, the following sequence is observed: 00000000, 00040000, 00080000, 000C0000, 00100000, 00000000, 04000000, 08000000, 0C000000, 10000000. The input counters follow a similar pattern during recording. | ||
| + | |||
| + | Maybe the separate counters aren't L/R but more like some double FIFO mechanism for accessing memory? | ||
| + | |||
| + | Microphone input is monaural, but due to the way the I2S interface works, each sample is repeated twice. | ||
audio_controller.1742503145.txt.gz · Last modified: 2025/03/20 20:39 by arisotura